SOI MEMS MPW

Tronics has provided its unique expertise in SOI micromachining as a low-cost MPW service since 1999. We have enabled universities, research centers and companies to train students and staff in this cutting-edge technology, and evaluate structures and innovative concepts cost effectively.

We are the first company to offer a qualified industrial technology of
60µm thick SOI High Aspect Ratio Micromachining featuring hermetic wafer level packaging in a MPW service.
This technology allows the fabrication of innovative structures such as:

• Capacitive sensors
• Electrostatic actuators
• High Q factor resonating structures
• Electrostatic optical structures
• Energy scavengers
• Microfluidics test structures

This service provides universities, research labs and companies with a Design Rules Manual and associated Software Design Kit based on the Coventor tool suite, enabling them to design their own structures and components. They can then submit their designs for production in regular low-cost runs. The result: continuous design improvement.

For each design submitted (one location), we deliver 20 dies, released and protected by a hermetic silicon wafer level package.

Chip Characteristics:

• Die size: 8 x 7 mm2
• Active area: 7.5 x 6.5 mm2
• Hermetic silicon cap
• Up to 24 pads or openings on the cap
• Structures released

Planning of the runs:

Prices of the Runs:
Tapering prices are proposed for multiple design submissions. Special pricing is available for universities and research labs.

Training sessions are provided twice per year through the STIMESI organization, see www.stimesi.org for more information or download the program of the next course.

University and research lab members of the Europractice IC Service can also access the service through IMEC. For more information see www.europractice-ic.com.